NCA-GENL Core Machine Learning and AI Knowledge Practice Question
When utilizing Pipeline Parallelism (PP) in LLM training, what is the 'pipeline bubble' and how is it minimized?
⚠ Common exam trap
Candidates often confuse pipeline bubbles with tensor parallelism communication overhead or data parallelism gradient synchronization delays, failing to recognize pipeline-specific idle GPU time.
Answer choices
Why each option matters
Answer the question above first, then reveal the full breakdown to understand why each option is right or wrong.
Correct answer & explanation
✓
Idle GPU time during stage-to-stage communication.
The pipeline bubble is the idle time GPUs spend waiting for activations or gradients to propagate across the pipeline stages. It is minimized using techniques like Micro-batching, which breaks a single global batch into smaller units. By interleaving these units, the GPU stages can remain active more consistently, significantly increasing the pipeline's overall utilization and throughput, which is essential for scaling models that cannot fit on a single GPU's memory.
Answer analysis
Option-by-option breakdown
For each option: why learners choose it and why it is or isn't the right answer here.
- ✓
Idle GPU time during stage-to-stage communication.
Why this is correct
The pipeline bubble represents the period during the start and end of a forward/backward pass where some GPUs are waiting for work because they are dependent on the output of previous pipeline stages. Micro-batching ensures these stages are filled with more tasks, reducing the duration of this unproductive idle time.
- ✗
Memory overflow caused by large context windows.
Why it's wrong here
Memory overflow is a capacity issue, not a timing or synchronization issue like the pipeline bubble. Pipeline bubbles are performance inefficiencies related to GPU utilization and scheduling, whereas memory overflows relate strictly to the total amount of data and activations that can be stored on the VRAM of a device.
- ✗
The overhead of gradient accumulation steps.
Why it's wrong here
Gradient accumulation is a tool used to reduce synchronization frequency, and while it creates its own trade-offs, it is distinct from the pipeline bubble. The bubble specifically refers to the idle cycles caused by the sequential nature of layers in a pipeline, which is a structural bottleneck of the PP architecture.
- ✗
The delay caused by slow NVLink interconnects.
Why it's wrong here
NVLink is a high-speed interconnect that minimizes communication latency, not a cause of the pipeline bubble. The bubble is primarily a result of the model's serial structure and the dependency between stages, rather than the raw speed of the interconnect, which handles the necessary data transfer between stages.
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Last reviewed September 2026 · checked against the official NVIDIA exam blueprint
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