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NCA-GENL Software Development Practice Question

When deploying a Large Language Model using TensorRT-LLM, which TWO configuration factors must be tuned to maximize KV cache efficiency?

⚠ Common exam trap

Candidates often focus on model weights or batch sizes, overlooking that the KV cache is the primary bottleneck for memory consumption and concurrent request handling in TensorRT-LLM.

Answer choices

Why each option matters

Answer the question above first, then reveal the full breakdown to understand why each option is right or wrong.

Correct answer & explanation

✓

KV cache block size.

Maximizing KV cache efficiency is essential for scaling inference performance and reducing memory fragmentation. By tuning the block size and the number of blocks allocated, developers prevent out-of-memory errors and ensure smooth handling of long-context requests. This is a foundational skill for engineers deploying generative models in production, as it directly influences the number of concurrent requests the GPU can manage effectively during peak usage.

Answer analysis

Option-by-option breakdown

For each option: why learners choose it and why it is or isn't the right answer here.

  • ✓

    KV cache block size.

    Why this is correct

    The KV cache block size determines how memory is partitioned for attention heads. Setting an optimal block size balances memory fragmentation and allocation overhead, preventing wasted VRAM that would otherwise be unusable for storing new tokens, thus maximizing the total sequence capacity available for concurrent users.

  • ✗

    Model quantization bit-width.

    Why it's wrong here

    While quantization reduces the memory footprint of model weights, it is distinct from the KV cache management. Adjusting bit-width affects weight storage and computational precision, but it does not directly manage the dynamic memory allocation patterns required for efficient KV cache management during the decoding phase.

  • ✓

    Maximum number of blocks.

    Why this is correct

    Configuring the maximum number of blocks controls the upper bound of active tokens stored in VRAM. Properly sizing this limit prevents the inference engine from crashing due to memory exhaustion while ensuring that high-concurrency workloads are supported without triggering constant re-allocation, which is computationally expensive.

  • ✗

    Input prompt token limit.

    Why it's wrong here

    The input prompt token limit dictates the maximum size of incoming requests but does not tune the underlying cache structure itself. Tuning this is an application-level constraint, whereas KV cache efficiency is a system-level parameter managed by the TensorRT-LLM runtime engine during model execution.

  • ✗

    GPU clock speed frequency.

    Why it's wrong here

    GPU clock speed affects raw computational throughput but does not address the memory layout or management of the KV cache. While higher clocks improve speed, they do not resolve fragmentation or capacity issues inherent in KV cache structures, making them irrelevant for this specific optimization task.

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Written and reviewed by Johnson Ajibi, MSc IT Security

Senior Network & Security Engineer · founder of Courseiva

Last reviewed September 2026 · checked against the official NVIDIA exam blueprint

This NCA-GENL practice question is part of Courseiva's free NVIDIA certification practice question bank. Courseiva provides original exam-style practice questions with explanations, topic-based practice, mock exams, readiness tracking, and study analytics to help learners prepare for the NCA-GENL exam.