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220-1201 Practice Question: A technician is troubleshooting a PC that fails…

A technician is troubleshooting a PC that fails to boot and emits a series of long beeps. The motherboard documentation indicates this is a memory error. Which component on the motherboard is responsible for generating these beep codes?

Answer choices

Why each option matters

Answer the question above first, then reveal the full breakdown to understand why each option is right or wrong.

Correct answer & explanation

BIOS/UEFI chip

The BIOS/UEFI firmware is responsible for the Power-On Self-Test (POST) and uses the speaker to emit beep codes to indicate hardware errors. The CMOS battery only retains settings, the chipset handles data flow, and the Super I/O manages I/O but not POST beep codes.

Answer analysis

Option-by-option breakdown

For each option: why learners choose it and why it is or isn't the right answer here.

  • CMOS battery

    Why it's wrong here

    The CMOS battery provides continuous power to the Complementary Metal-Oxide-Semiconductor (CMOS) memory, which stores the system's BIOS/UEFI settings, date, and time, even when the computer is unplugged. While essential for maintaining these configurations, the CMOS battery itself is a power source and does not contain any logic or firmware capable of executing the Power-On Self-Test (POST) or generating diagnostic beep codes. A dead CMOS battery might cause settings to revert to defaults, but it won't directly prevent POST or produce beep codes.

  • BIOS/UEFI chip

    Why this is correct

    The BIOS (Basic Input/Output System) or its modern successor, UEFI (Unified Extensible Firmware Interface), resides on a flash memory chip on the motherboard and is the primary firmware responsible for initiating the computer's boot process. Immediately upon power-on, the BIOS/UEFI executes the Power-On Self-Test (POST), which checks essential hardware components like the CPU, RAM, and video card. If a critical hardware fault is detected during POST, the BIOS/UEFI firmware generates specific audible beep codes through the internal speaker to signal the nature of the problem before any video output can be displayed.

  • Chipset

    Why it's wrong here

    The chipset, typically comprising a Northbridge (or integrated into the CPU) and a Southbridge (now often a Platform Controller Hub or PCH), acts as the central communication hub on the motherboard, managing data flow between the CPU, memory, expansion buses (PCIe), and peripheral devices. While critical for system operation and component interaction, the chipset is a collection of integrated circuits that facilitate data transfer and control, not a programmable firmware component that executes boot routines or generates diagnostic beep codes. Its role is to enable components to talk to each other, not to diagnose their initial failure.

  • Super I/O chip

    Why it's wrong here

    The Super I/O (SIO) chip is a specialized integrated circuit found on motherboards, primarily responsible for managing legacy input/output devices such as serial ports, parallel ports, PS/2 keyboard/mouse ports, and floppy disk controllers. Additionally, it often handles hardware monitoring functions like fan speed control, temperature sensing, and voltage monitoring. Although the SIO chip communicates with the BIOS/UEFI, it does not contain the POST firmware itself nor does it possess the capability to generate the initial diagnostic beep codes that signal critical hardware failures during the very early stages of system startup.

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Written by Johnson Ajibi, MSc IT Security

Senior Network & Security Engineer · founder of Courseiva

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